Infineon/CYPRESS S29GL064S70TFI010

The S29GL-S mid density family of devices are 3.0-volt single-power flash memory manufactured using 65 nm MirrorBit technology. The S29GL064S is a 64-Mb device organized as 4,194,304 words or 8,388,608 bytes. Depending on the model number, the devices have 16-bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The devices can be programmed either in the host system or in standard EPROM programmers. Access times as fast as 70 ns are available. Note that each access time has a specific operating voltage range (VCC) as specified in the Product Selector Guide and Ordering Information. Package offerings include 48-pin TSOP, 56-pin TSOP, 48-ball fine-pitch BGA, and 64-ball Fortified BGA, depending on model number. Each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. Each device requires only a single 3.0-volt power supply for both read and write functions. In addition to a VCC input, a high-voltage accelerated program (ACC) feature is supported through increased voltage on the WP#/ACC or ACC input. This feature is intended to facilitate system production. The device is entirely command set compatible with the JEDEC single-power-supply flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. The Advanced Sector Protection features several levels of sector protection, which can disable both the program and erase operations in certain sectors. Persistent

• CMOS 3.0 Volt Core with Versatile I/O
• Single Power Supply Operation
• Manufactured on 65 nm MirrorBit Process Technology
• Secure Silicon Region – 128-word/256-byte sector for permanent, secure identification through an 8-word / 16-byte random Electronic Serial Number, accessible through a command sequence – Programmed and locked at the factory or by the customer
• Flexible Sector Architecture – 64 Mb (uniform sector models): One hundred twenty-eight 32-kword (64-kB) sectors – 64 Mb (boot sector models): One hundred twenty-seven 32-kword (64-kB) sectors + eight 4kword (8kB) boot sectors
• Automatic Error Checking and Correction (ECC) - internal hardware ECC with single bit error correction
• Enhanced Versatile I/O Control – All input levels (address, control, and DQ input levels) and outputs are determined by voltage on V10 input. V10 range is 1.65 to VCC
• Compatibility with JEDEC Standards – Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection
• 100,000 Erase Cycles per Sector Minimum
• 20-year Data Retention Typical
• High Performance – 70 ns access time – 8-word / 16-byte page read buffer – 15 ns page read time – 128-word / 256-byte write buffer which reduces overall programming time for multiple-word updates
• Low Power Consumption - 25 mA typical initial read current @ 5 MHz - 7.5 mA typical page read current @ 33 MHz - 50 mA typical erase / program current - 40 μA typical standby mode current
• Software Features – Advanced Sector Protection: offers Persistent Sector Protection and Password Sector Protection – Program Suspend and Resume: read other sectors before programming operation is completed – Erase Suspend and Resume: read / program other sectors before an erase operation is completed – Data# polling and toggle bits provide status – CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices – Unlock Bypass Program command reduces overall multiple-word programming time
• Hardware Features – WP#/ACC input supports manufacturing programming operations (when high voltage is applied). Protects first or last sector regardless of sector protection settings on uniform sector models – Hardware reset input (RESET#) resets device – Ready/Busy# output (RY/BY#) detects program or erase cycle completion