onsemi N24C64UVTG
| Manufacturer | |
| MPN | N24C64UVTG |
| LCSC Part # | C603341 |
| Packaging | SOIC-8 |
| Customer # | |
| Key Attributes | 64Kbit 1.6V~5.5V 1MHz I2C SOIC-8 Memory (ICs) RoHS |
| Datasheet |  onsemi N24C64UVTG |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Memory Size | 64Kbit | |
| Voltage - Supply | 1.6V~5.5V | |
| Operating temperature | -40℃~+125℃ | |
| Clock Frequency | 1MHz | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Noise suppression function | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 4ms | |
| Write Cycle Endurance | 1,000,000 cycles | |
| Interface | I2C |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The N24C64 is a EEPROM Serial 64-Kb I²C device, organized internally as 256 pages of 32 bytes each. This device supports the Standard [100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I²C protocol. Data is written by providing a starting address, then loading 1 to 32 contiguous bytes into a Page Write Buffer, and then writing all data to non−volatile memory in one internal write cycle. Data is read by providing a starting address and then shifting out data serially while automatically incrementing the internal address count. External address pins make it possible to address up to eight N24C64 devices on the same bus.
Features
- Automotive AEC−Q100 Grade 1 (-40℃ to +125℃) Qualified
- Supports Standard, Fast and Fast−Plus I²C Protocol
- 1.7 V / 1.6 V to 5.5 V Supply Voltage Range
- 32−Byte Page Write Buffer
- Fast Write Time (4 ms max)
- Hardware Write Protection for Entire Memory
- Schmitt Triggers and Noise Suppression Filters on I²C Bus Inputs (SCL and SDA)
- Low Power CMOS Technology
- 1,000,000 Program/Erase Cycles
- 100 Year Data Retention
- Industrial and Automotive Grade 1 Temperature Range
- US 8−lead and 4−ball WLCSP Packages
- These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS Compliant
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 0.7519 | $ 0.75 |
| 200+ | $ 0.2907 | $ 58.14 |
| 500+ | $ 0.2814 | $ 140.70 |
| 1,000+ | $ 0.2768 | $ 276.80 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Memory Size | 64Kbit | |
| Voltage - Supply | 1.6V~5.5V | |
| Operating temperature | -40℃~+125℃ | |
| Clock Frequency | 1MHz | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Noise suppression function | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 4ms | |
| Write Cycle Endurance | 1,000,000 cycles | |
| Interface | I2C |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The N24C64 is a EEPROM Serial 64-Kb I²C device, organized internally as 256 pages of 32 bytes each. This device supports the Standard [100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I²C protocol. Data is written by providing a starting address, then loading 1 to 32 contiguous bytes into a Page Write Buffer, and then writing all data to non−volatile memory in one internal write cycle. Data is read by providing a starting address and then shifting out data serially while automatically incrementing the internal address count. External address pins make it possible to address up to eight N24C64 devices on the same bus.
Features
- Automotive AEC−Q100 Grade 1 (-40℃ to +125℃) Qualified
- Supports Standard, Fast and Fast−Plus I²C Protocol
- 1.7 V / 1.6 V to 5.5 V Supply Voltage Range
- 32−Byte Page Write Buffer
- Fast Write Time (4 ms max)
- Hardware Write Protection for Entire Memory
- Schmitt Triggers and Noise Suppression Filters on I²C Bus Inputs (SCL and SDA)
- Low Power CMOS Technology
- 1,000,000 Program/Erase Cycles
- 100 Year Data Retention
- Industrial and Automotive Grade 1 Temperature Range
- US 8−lead and 4−ball WLCSP Packages
- These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS Compliant
C603341 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |