Alliance Memory AS4C16M16SA-6TIN
| Manufacturer | |
| MPN | AS4C16M16SA-6TIN |
| LCSC Part # | C570212 |
| Packaging | TSOP-54-10.2mm |
| Customer # | |
| Key Attributes | 256M-(16Mx16bit) Synchronous DRAM (SDRAM) |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Alliance Memory | |
| Packaging | TSOP-54-10.2mm | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 3V~3.6V | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 166MHz | |
| Features | High-speed clock synchronization;Auto precharge;Auto refresh |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 108 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The SDRAM provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.
Features
- Fast access time from clock: 5/5.4 ns
- Fast clock rate: 166/143 MHz
- Fully synchronous operation
- Internal pipelined architecture
- 4M word x 16-bit x 4-bank
- Programmable Mode registers - CAS Latency: 2 or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function
- Operating temperature range - Commercial (0 to 70℃) - Industrial (-40 to 85℃)
- Auto Refresh and Self Refresh
- 8192 refresh cycles/64ms
- CKE power down mode
- Single +3.3V ±0.3V power supply
- Interface: LVTTL
- 54-pin 400 mil plastic TSOP II package
- 54-ball 8.0x8.0x1.2mm (max) FBGA package - All parts ROHS are compliant
Applications
- applications requiring high memory bandwidth
- high performance PC applications
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 6.4543 | $ 6.45 |
| 10+ | $ 5.6319 | $ 56.32 |
| 30+ | $ 5.1301 | $ 153.90 |
| 108+ | $ 4.7108 | $ 508.77 |
Standard Packaging108/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Alliance Memory | |
| Packaging | TSOP-54-10.2mm | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 3V~3.6V | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 166MHz | |
| Features | High-speed clock synchronization;Auto precharge;Auto refresh |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 108 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The SDRAM provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.
Features
- Fast access time from clock: 5/5.4 ns
- Fast clock rate: 166/143 MHz
- Fully synchronous operation
- Internal pipelined architecture
- 4M word x 16-bit x 4-bank
- Programmable Mode registers - CAS Latency: 2 or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function
- Operating temperature range - Commercial (0 to 70℃) - Industrial (-40 to 85℃)
- Auto Refresh and Self Refresh
- 8192 refresh cycles/64ms
- CKE power down mode
- Single +3.3V ±0.3V power supply
- Interface: LVTTL
- 54-pin 400 mil plastic TSOP II package
- 54-ball 8.0x8.0x1.2mm (max) FBGA package - All parts ROHS are compliant
Applications
- applications requiring high memory bandwidth
- high performance PC applications
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |



