WCH CH552G

The CH552 is an enhanced E8051 core MCU compatible with the MCS51 instruction set. 79% of its instructions are single-byte, single-cycle instructions, with an average instruction speed 8~15 times faster than standard MCS51. The CH552 supports a maximum system clock frequency of 24MHz, with a built-in 16K program memory ROM, 256 bytes of internal iRAM, and 1K bytes of on-chip xRAM with DMA support. The CH552 integrates ADC, capacitive touch key detection, 3 timer groups with signal capture and PWM, dual UART, SPI, a USB device controller, and a full-speed transceiver. The CH551 is a simplified version of the CH552, featuring 10K program memory ROM, 512 bytes of on-chip xRAM, UART0 only, SOP16 package only, 4-channel touch keys only, with the ADC and USB Type-C modules removed. All other features are identical to the CH552; the CH552 datasheet and documentation can be referenced directly.

• Enhanced E8051 core, MCS51 instruction set compatible; 79% of instructions are single-byte single-cycle, averaging 8~15× faster than standard MCS51; dedicated XRAM fast data copy instruction; dual DPTR pointers.
• 16KB re-programmable non-volatile ROM, fully usable as program storage; or partitioned into a 14KB program area and a 2KB BootLoader/ISP area.
• 128-byte re-erasable non-volatile data memory, supporting byte-level data rewriting.
• 256-byte internal iRAM for fast data buffering and stack; 1KB on-chip xRAM for bulk data buffering and DMA.
• Integrated USB controller and USB transceiver; USB-Device mode; USB Type-C host/device detection; USB 2.0 full-speed 12Mbps or low-speed 1.5Mbps; max 64-byte packets; built-in FIFO with DMA support.
• 3 timers: T0/T1/T2 are standard MCS51 timers.
• Timer T2 extended with 2-channel signal capture.
• 2 PWM outputs: PWM1/PWM2, dual 8-bit PWM.
• 2 UARTs, both supporting higher baud rates; UART0 is standard MCS51 serial port.
• SPI controller with built-in FIFO; clock up to Fsys/2; supports simplex multiplexed serial data I/O; Master/Slave mode.
• 4-channel 8-bit ADC with voltage comparison support.
• 6-channel capacitive sensing; up to 15 touch keys; dedicated timer interrupt.
• Up to 17 GPIO pins (including XI/XO, RST, and USB signal pins).
• 14 interrupt sources: 6 standard MCS51-compatible (INT0, T0, INT1, T1, UART0, T2) plus 8 extended (SPI0, TKEY, USB, ADC, UART1, PWMX, GPIO, WDOG); GPIO interrupt selectable from 7 pins.
• 8-bit presettable watchdog timer (WDOG) with timer interrupt support.
• 4 reset sources: built-in power-on reset; software reset; watchdog overflow reset; optional external pin reset.
• Built-in 24MHz clock source; external crystal supported via multiplexed GPIO pins.
• Built-in 5V-to-3.3V LDO; supports 5V or 3.3V supply voltage; low-power sleep with wake-up via USB, UART0, UART1, SPI0, and select GPIO pins.
• On-chip unique ID.