WCH CH554T
| Manufacturer | WCHAsian Brands |
| MPN | CH554T |
| LCSC Part # | C106886 |
| Packaging | TSSOP-20 |
| Customer # | |
| Key Attributes | 8-bit enhanced USB microcontroller |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | WCH | |
| Packaging | TSSOP-20 | |
| ADC (Bit) | 8bit | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 3.3V~5V | |
| Program Storage Size | 16KB | |
| CPU Core | 51 Series | |
| CPU Maximum Speed | 24MHz | |
| Number of I/O | 17 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 50 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CH554 is an enhanced E8051 core MCU compatible with the MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions, delivering an average instruction execution speed 8~15 times faster than standard MCS51.
The CH554 supports a maximum system clock frequency of 24MHz, with built-in 16K program ROM, 256 bytes of internal iRAM, and 1K bytes of on-chip xRAM. The xRAM supports DMA direct memory access.
The CH554 integrates ADC analog-to-digital conversion, capacitive touch key detection, 3 timer/signal capture and PWM channels, dual UART, SPI, and other functional modules, with support for both USB-Host and USB-Device modes.
Features
- Core: Enhanced E8051 core, MCS51 instruction set compatible; 79% of instructions are single-byte single-cycle, averaging 8~15× faster than standard MCS51; dedicated XRAM fast data copy instruction; dual DPTR pointers.
- ROM: 16KB multi-programmable non-volatile ROM — fully usable as program storage, or partitioned into a 14KB program area and a 2KB BootLoader/ISP area.
- DataFlash: 128-byte multi-erasable non-volatile data storage, supports byte-level data rewriting.
- RAM: 256-byte internal iRAM for fast data buffering and stack; 1KB on-chip xRAM for bulk data buffering and DMA access.
- USB: Integrated USB controller and transceiver; supports USB-Host and USB-Device modes; supports USB Type-C host/device detection; supports USB 2.0 full-speed 12Mbps or low-speed 1.5Mbps; max 64-byte packet size; built-in FIFO with DMA support.
- Timer: 3 timers — T0/T1/T2 are standard MCS51 timers.
- Capture: Timer T2 extended to support 2-channel signal capture.
- PWM: 2 PWM outputs — PWM1/PWM2 are dual 8-bit PWM outputs.
- UART: 2 async serial ports, both supporting higher baud rates; UART0 is a standard MCS51 serial port.
- SPI: Built-in FIFO; clock frequency up to Fsys/2; supports simplex multiplexed serial data I/O; Master/Slave mode support.
- ADC: 4-channel 8-bit ADC with voltage comparison support.
- Touch-Key: 6-channel capacitive sensing; supports up to 15 touch keys; supports independent timed interrupts.
- GPIO: Up to 17 GPIO pins (including XI/XO, RST, and USB signal pins).
- Interrupt: 14 interrupt sources — 6 MCS51-compatible (INT0, T0, INT1, T1, UART0, T2) plus 8 extended (SPI0, TKEY, USB, ADC, UART1, PWMX, GPIO, WDOG); GPIO interrupt selectable from 7 pins.
- Watch-Dog: 8-bit presettable watchdog timer (WDOG) with timed interrupt support.
- Reset: 4 reset sources — built-in power-on reset; software reset; watchdog overflow reset; optional external pin reset.
- Clock: Built-in 24MHz clock source; external crystal supported via multiplexed GPIO pins.
- Power: Built-in 5V-to-3.3V LDO; supports 5V, 3.3V, or 2.8V supply voltage; low-power sleep mode; wake-up via USB, UART0, UART1, SPI0, and select GPIO pins.
- On-chip unique ID.
Applications
-
USB-Host mode
-
USB-Device mode
-
Touch key capacitance detection
-
Timer and signal capture
-
PWM output
-
Asynchronous UART
-
SPI controller
-
ADC conversion
-
Voltage comparison
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | WCH | |
| Packaging | TSSOP-20 | |
| ADC (Bit) | 8bit | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 3.3V~5V | |
| Program Storage Size | 16KB | |
| CPU Core | 51 Series | |
| CPU Maximum Speed | 24MHz | |
| Number of I/O | 17 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 50 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CH554 is an enhanced E8051 core MCU compatible with the MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions, delivering an average instruction execution speed 8~15 times faster than standard MCS51.
The CH554 supports a maximum system clock frequency of 24MHz, with built-in 16K program ROM, 256 bytes of internal iRAM, and 1K bytes of on-chip xRAM. The xRAM supports DMA direct memory access.
The CH554 integrates ADC analog-to-digital conversion, capacitive touch key detection, 3 timer/signal capture and PWM channels, dual UART, SPI, and other functional modules, with support for both USB-Host and USB-Device modes.
Features
- Core: Enhanced E8051 core, MCS51 instruction set compatible; 79% of instructions are single-byte single-cycle, averaging 8~15× faster than standard MCS51; dedicated XRAM fast data copy instruction; dual DPTR pointers.
- ROM: 16KB multi-programmable non-volatile ROM — fully usable as program storage, or partitioned into a 14KB program area and a 2KB BootLoader/ISP area.
- DataFlash: 128-byte multi-erasable non-volatile data storage, supports byte-level data rewriting.
- RAM: 256-byte internal iRAM for fast data buffering and stack; 1KB on-chip xRAM for bulk data buffering and DMA access.
- USB: Integrated USB controller and transceiver; supports USB-Host and USB-Device modes; supports USB Type-C host/device detection; supports USB 2.0 full-speed 12Mbps or low-speed 1.5Mbps; max 64-byte packet size; built-in FIFO with DMA support.
- Timer: 3 timers — T0/T1/T2 are standard MCS51 timers.
- Capture: Timer T2 extended to support 2-channel signal capture.
- PWM: 2 PWM outputs — PWM1/PWM2 are dual 8-bit PWM outputs.
- UART: 2 async serial ports, both supporting higher baud rates; UART0 is a standard MCS51 serial port.
- SPI: Built-in FIFO; clock frequency up to Fsys/2; supports simplex multiplexed serial data I/O; Master/Slave mode support.
- ADC: 4-channel 8-bit ADC with voltage comparison support.
- Touch-Key: 6-channel capacitive sensing; supports up to 15 touch keys; supports independent timed interrupts.
- GPIO: Up to 17 GPIO pins (including XI/XO, RST, and USB signal pins).
- Interrupt: 14 interrupt sources — 6 MCS51-compatible (INT0, T0, INT1, T1, UART0, T2) plus 8 extended (SPI0, TKEY, USB, ADC, UART1, PWMX, GPIO, WDOG); GPIO interrupt selectable from 7 pins.
- Watch-Dog: 8-bit presettable watchdog timer (WDOG) with timed interrupt support.
- Reset: 4 reset sources — built-in power-on reset; software reset; watchdog overflow reset; optional external pin reset.
- Clock: Built-in 24MHz clock source; external crystal supported via multiplexed GPIO pins.
- Power: Built-in 5V-to-3.3V LDO; supports 5V, 3.3V, or 2.8V supply voltage; low-power sleep mode; wake-up via USB, UART0, UART1, SPI0, and select GPIO pins.
- On-chip unique ID.
Applications
-
USB-Host mode
-
USB-Device mode
-
Touch key capacitance detection
-
Timer and signal capture
-
PWM output
-
Asynchronous UART
-
SPI controller
-
ADC conversion
-
Voltage comparison
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |


