Nexperia 74HC4046AD,652

The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. The 74HC4046A; 74HCT4046A is a phase-locked-loop circuit that comprises a linear VCO and three different phase comparators (PC1, PC2 and PC3). It has a common signal input amplifier and a common comparator input. The signal input can be directly coupled to a large voltage signal, or indirectly coupled (with a series capacitor) to a small voltage signal. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 74HC4046A; 74HCT4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op amp techniques.

• Low power consumption
• VCO-Inhibit control for ON/OFF keying and for low standby power consumption
• Center frequency up to 17 MHz (typical) at VCC = 4.5 V
• Choice of three phase comparators: PC1: EXCLUSIVE-OR PC2: Edge-triggered J-K flip-flop PC3: Edge-triggered RS flip-flop
• Excellent Voltage Controlled Oscillator (VCO) linearity
• Low frequency drift with supply voltage and temperature variations
• Operating power supply voltage range: VCO section 3.0 V to 6.0 V, Digital section 2.0 V to 6.0 V
• Zero voltage offset due to operational amplifier buffering
• ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V

• FM modulation and demodulation
• Frequency synthesis and multiplication
• Frequency discrimination
• Tone decoding
• Data synchronization and conditioning
• Voltage-to-frequency conversion
• Motor-speed control